MODEL 1711 CBHI

VMEbus-Based to CAMAC DMA Branch Highway Interface Module

FEATURES

Interface to the ANSI/IEEE Std 596-1982 Standard Parallel Interface System (CAMAC) such as Bi Ra Model 1302-LM.
Executes CAMAC Branch Highway read and write block transfers at approximately 1.8 and 2.2 ľsec per BH cycle, respectively.
Controlled by an intelligent VMEbus CPU such as the Mizar MZ7122, MZ7130, MZ7140 or the Motorola MVME165 or MVME166 via VSB bus.
Up to five CBHIs may be controlled by single VMEbus CPU.
Two internal Altera sequencer ICs execute lists of CAMAC operations without CPU intervention leaving the VMEbus CPU free to perform other tasks during list execution.
Executing lists of CAMAC operations interrutible to perform a single CAMAC operation.
Front panel event trigger inputs and level or pulse outputs.
Event readout initiation by a VMEbus master, CAMAC LAM or front-panel input interrupt.
Special modes for higher performance 1711 data readout such as big or little endian format and two 16-bit words/read.
Diagnostics simplified via a CAMAC operation status byte and diagnostic registers.
EPICS and other software drivers soon.

APPLICATIONS

High-performance gathering of CAMAC data in a system with arrays of high-level VMEbus processors.
General purpose VMEbus- based CAMAC Branch Highway Driver.

GENERAL DESCRIPTION

The Bi Ra Model CBHI single- width VME (6U) module is designed to provide an extremely versatile and high-speed interface between a VMEbus system and a CAMAC Branch Highway. The module resides in a VMEbus crate and is controlled via the VSB bus by a VMEbus CPU. The VMEbus CPU and CBHI work as a pair to comprise a CAMAC parallel Branch Highway Driver. What sets the CBHI apart from other CAMAC Branch Drivers is that it contains all the intelligence to perform lists of CAMAC operations without intervention by the VMEbus CPU. This (and VSB bus specifications) is why one VMEbus CPU can control up to five CBHI modules and thus five CAMAC Branch Highways in a high-performance data acquisition system. Twenty-five opcodes (types of operations) and variations on each of the opcodes are supported within the CBHI. The VMEbus CPU need only initiate list execution within a CBHI and then the CPU is free to perform data manipulations or data transfers to high-level processors of previously collected data. One or more lists of CAMAC operations may be stored within a CBHI and initiated by the VMEbus master, a host computer, a CAMAC Branch Demand (via a LAM) or a front-panel interrupt. Communications between the VMEbus CPU and the CBHI are via a dual-port RAM in the CBHI and CBHI-generated interrupts to the CPU. Given a VMEbus CPU with DMA capabilities, it is possible to simultaneously have a CBHI (or multiple CBHIs) reading data from a current event while the VMEbus CPU is manipulating data from the previous event while the DMA hardware within the CPU is transferring data from an earlier event to a high-level VMEbus processor. These features described and several other features within the CBHI should enhance and extend the usefulness of CAMAC-based data acquisition systems for many years.

THE VMEbus CPU HAS ACCESS TO THE FOLLOWING INTERNAL CBHI FEATURES:

4096 32-bit words of dual-port RAM for lists of CAMAC operations and resultant data
Special readout modes to access two 16-bit words of data per each 32-bit read of the CBHI in big or little endian format.
Front-panel LEDs for monitoring CBHI activity.

FRONT PANEL LEDs

DONE	(CAMAC) list execution completed
SOC	Successful operation completed
WRCLNR	Word/Repeat Count Limit not reached
ERROR	Error during list execution
FP INTR	Front-panel interrupt(s) present
BD	Branch Demand present
RUNNING	List execution in progress
HALTED	List execution halted
+5V	Fused +5 volt power present

CONNECTORS

Front-panel inputs (RS-485 differential)	10-pin flat ribbon
Front-panel outputs (RS-485 differential)	10-pin flat ribbon
CAMAC Branch Highway	132-pin Hughes
VSB bus connections and power	VMEbus J1 and J2

VSB SLAVE INTERFACE

The VSB bus 32-bit slave interface is the port through which the VMEbus CPU module controls the CBHI module. The CBHI is accessed in VSB Systems Address space only. An eight-position DIP switch is provided for setting the CBHI base address to allow up to five CBHI modules to be connected to one VMEbus CPU. The VSB IRQ (Interrupt Request) line is used by the CBHI to interrupt the VMEbus CPU whenever necessary.

POWER REQUIREMENTS

The CBHI requires +5 volts at 2.7 amps which is supplied via the VMEbus J1 and J2 connectors. Note that the CBHI connects to the VMEbus power pins only; no VMEbus protocol signals are used.

SIZES

The CBHI is a standard single-width 6U VMEbus module.

WEIGHT

.70 Kg (1 lb. 8 oz.)

ORDERING INFORMATION

Model 1711 CBHI VMEbus-based CAMAC Branch Highway Interface Module

ACCESSORIES

Highway Branch Cable Model 8102-X

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Bi Ra Systems, Incorporated
2404 Comanche Road NE
Albuquerque, New Mexico 87107
Ph : 505-881-8887
Fax:505-888-0651